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Freescale Semiconductor /SKEAZ1284 /SIM /PINSEL1

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Interpret as PINSEL1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (00)FTM2PS0 0 (00)FTM2PS1 0 (00)FTM2PS2 0 (00)FTM2PS3 0 (0)FTM2PS4 0 (0)FTM2PS5 0 (0)I2C1PS 0 (0)SPI1PS 0 (0)UART1PS 0 (0)UART2PS 0 (0)PWTIN0PS 0 (0)PWTIN1PS 0 (0)MSCANPS

FTM2PS1=00, PWTIN1PS=0, FTM2PS4=0, UART2PS=0, UART1PS=0, FTM2PS5=0, I2C1PS=0, FTM2PS0=00, SPI1PS=0, FTM2PS2=00, MSCANPS=0, PWTIN0PS=0, FTM2PS3=00

Description

Pin Selection Register 1

Fields

FTM2PS0

FTM2 Channel 0 Pin Select

0 (00): FTM2 CH0 mapped on PTC0.

1 (01): FTM2 CH0 mapped on PTH0.

2 (10): FTM2 CH0 mapped on PTF0.
FTM2PS1

FTM2 Channel 1 Pin Select

0 (00): FTM2 CH1 mapped on PTC1.

1 (01): FTM2 CH1 mapped on PTH1.

2 (10): FTM2 CH1 mapped on PTF1.
FTM2PS2

FTM2 Channel 2 Pin Select

0 (00): FTM2 CH2 mapped on PTC2.

1 (01): FTM2 CH2 mapped on PTD0.

2 (10): FTM2 CH2 mapped on PTG4.
FTM2PS3

FTM2 Channel 3 Pin Select

0 (00): FTM2 CH3 mapped on PTC3.

1 (01): FTM2 CH3 mapped on PTD1.

2 (10): FTM2 CH3 mapped on PTG5.
FTM2PS4

FTM2 Channel4 Pin Select

0 (0): FTM2 CH4 mapped on PTB4.

1 (1): FTM2 CH4 mapped on PTG6.
FTM2PS5

FTM2 Channel 5 Pin Select

0 (0): FTM2 CH5 mapped on PTB5.

1 (1): FTM2 CH5 mapped on PTG7.
I2C1PS

I2C1 Pin Select

0 (0): I2C1_SCL on PTE1, I2C1_SDA on PTE0.

1 (1): I2C1_SCL on PTH4, I2C1_SDA on PTH3.
SPI1PS

SPI1 Pin Select

0 (0): SPI1_SCK, SPI1_MOSI, SPI1_MISO, and SPI1_PCS are mapped on PTD0, PTD1, PTD2, and PTD3.

1 (1): SPI1_SCK, SPI1_MOSI, SPI1_MISO, and SPI1_PCS are mapped on PTG4, PTG5, PTG6, and PTG7.
UART1PS

UART1 Pin Select

0 (0): UART1_TX on PTC7, UART1_RX on PTC6.

1 (1): UART1_TX on PTF3, UART1_RX on PTF2.
UART2PS

UART2 Pin Select

0 (0): UART2_TX on PTD7, UART2_RX on PTD6.

1 (1): UART2_TX on PTI1, UART2_RX on PTI0.
PWTIN0PS

PWTIN0 Pin Select

0 (0): PWTIN0 on PTD5.

1 (1): PWTIN0 on PTE2.
PWTIN1PS

PWTIN1 Pin Select

0 (0): PWTIN1 on PTB0.

1 (1): PWTIN1 on PTH7.
MSCANPS

MSCAN Pin Select

0 (0): CAN_TX on PTC7, CAN_RX on PTC6.

1 (1): CAN_TX on PTE7, CAN_RX on PTH2.

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data